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Integration of GMR-based spin torque oscillators and CMOS circuitry

Journal article
Authors T. Chen
A. Eklund
S. Sani
S. Rodriguez
B. G. Malm
Johan Åkerman
A. Rusu
Published in Solid-State Electronics
Volume 111
Pages 91-99
ISSN 0038-1101
Publication year 2015
Published at Department of Physics (GU)
Pages 91-99
Language en
Keywords CMOS, Giant magnetoresistance, Integration, On-chip bias-tee, Spin torque oscillator, Wire bonding, FIELD, Engineering, Electrical & Electronic, Physics, Applied, Physics, Condensed Matter
Subject categories Condensed Matter Physics


This paper demonstrates the integration of giant magnetoresistance (GMR) spin torque oscillators (STO) with dedicated high frequency CMOS circuits. The wire-bonding-based integration approach is employed in this work, since it allows easy implementation, measurement and replacement. A GMR STO is wire-bonded to the dedicated CMOS integrated circuit (IC) mounted on a PCB, forming a (GMR STO + CMOS IC) pair. The GMR STO has a lateral size of 70 nm and more than an octave of tunability in the microwave frequency range. The proposed CMOS IC provides the necessary bias-tee for the GMR STO, as well as electrostatic discharge (ESD) protection and wideband amplification targeting high frequency GMR STO-based applications. It is implemented in a 65 nm CMOS process, offers a measured gain of 12 dB, while consuming only 14.3 mW and taking a total silicon area of 0.329 mm(2). The measurement results show that the (GMR STO + CMOS IC) pair has a wide tunability range from 8 GHz to 16.5 GHz and improves the output power of the GMR STO by about 10 dB. This GMR STO-CMOS integration eliminates wave reflections during the signal transmission and therefore exhibits good potential for developing high frequency GMR STO-based applications, which combine the features of CMOS and STO technologies. (C) 2015 Elsevier Ltd. All rights reserved.

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